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=7 )1>   b  ()*+5,)c /  #   )9+5(9  ()+5*      i/o 0-31 data inputs/outputs a 0-16 address inputs we 1-4 write enables cs 1-4 chip selects oe output enable v cc power supply gnd ground nc not connected    
      
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           i/o 0-31 data inputs/outputs a 0-16 address inputs we write enables cs 1-4 chip selects oe output enable v cc power supply gnd ground nc not connected      i/o 0-31 data inputs/outputs a 0-16 address inputs we 1-4 write enables cs 1-4 chip selects oe output enable v cc power supply gnd ground nc not connected         
           
  
  
   
    
 
  
 
 
  
   

  ! " white electronic designs             oe capacitance c oe v in = 0v, f = 1.0 mhz 50 pf we 1-4 capacitance c we v in = 0v, f = 1.0 mhz pf hip (pga) h1 20 cqfp g4t 50 cqfp g2u/g2l 20 cqfp g1u/g1t 20 cs 1-4 capacitance c cs v in = 0v, f = 1.0 mhz 20 pf data i/o capacitance c i/o v i/o = 0v, f = 1.0 mhz 20 pf address input capacitance c ad v in = 0v, f = 1.0 mhz 50 pf                  !   ! "#$    operating temperature t a -55 +125 c storage temperature t stg -65 +150 c signal voltage relative to gnd v g -0.5 vcc+0.5 v junction temperature t j 150 c supply voltage v cc -0.5 7.0 v  
  !% !& h x x standby high z standby l l h read data out active l x l write data in active l h h out disable high z active !   "       "#$    supply voltage v cc 4.5 5.5 v input high voltage v ih 2.2 v cc + 0.3 v input low voltage v il -0.3 +0.8 v operating temp. (mil.) t a -55 +125 c       #$$     "  '() '(* '+, '+)          input leakage current i li v cc = 5.5, v in = gnd to v cc 10 10 10 10 a output leakage current i lo cs = v ih , oe = v ih , v out = gnd to v cc 10 10 10 10 a operating supply current i cc cs = v il , oe = v ih , f = 5mhz, vcc = 5.5 600 600 600 600 ma standby current i sb cs = v ih , oe = v ih , f = 5mhz, vcc = 5.5 80 80 80 60 ma output low voltage v ol i ol = 8ma, v cc = 4.5 0.4 0.4 0.4 0.4 v output high voltage v oh i oh = -4.0ma, v cc = 4.5 2.4 2.4 2.4 2.4 v  "  '-) '.) '))        input leakage current i li v cc = 5.5, v in = gnd to v cc 10 10 10 a output leakage current i lo cs = v ih , oe = v ih , v out = gnd to v cc 10 10 10 a operating supply current i cc cs = v il , oe = v ih , f = 5mhz, vcc = 5.5 600 600 600 ma standby current i sb cs = v ih , oe = v ih , f = 5mhz, vcc = 5.5 60 60 60 ma output low voltage v ol i ol = 2.1ma, v cc = 4.5 0.4 0.4 0.4 v output high voltage v oh i oh = -1.0ma, v cc = 4.5 2.4 2.4 2.4 v  
 !"#$%& '"$% /00 "   "1   data retention voltage v cc v cc = 2.0v 2 - - v data retention quiescent current iccdr cs  vcc -0.2v - 1 2 ma chip disable to data retention time (1) t cdr v in  v cc -0.2v 0 - - ns operation recovery time (1) t r or v in - 0.2v t rc -ns       &            
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       "1  input pulse levels v il = 0, v ih = 3.0 v input rise and fall 5 ns input and output reference level 1.5 v output timing reference level 1.5 v        
       "#$ '() '(* '+, '+) '-) '.) '))  !"0$               read cycle time t rc 15 17 20 25 35 45 55 ns address access time t aa 15 17 20 25 35 45 55 ns output hold from address change t oh 00000 00ns chip select access time t acs 15 17 20 25 35 45 55 ns output enable to output valid t oe 10 10 12 15 20 25 30 ns chip select to output in low z t clz 1 33333 33ns output enable to output in low z t olz 1 00000 00ns chip disable to output in high z t chz 1 12 12 12 12 20 20 20 ns output disable to output in high z t ohz 1 12 12 12 12 20 20 20 ns               
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!"0$               write cycle time t wc 15 17 20 25 35 45 55 ns chip select to end of write t cw 14 14 15 20 25 30 45 ns address valid to end of write t aw 14 15 15 20 25 30 45 ns data valid to end of write t dw 10 10 12 15 20 25 25 ns write pulse width t wp 14 14 15 20 25 30 45 ns address setup time t as 0000 0 0 0 ns address hold time t ah 0000 0 0 0 ns output active from end of write t ow 1 3333 4 4 4 ns write enable to output in high z t whz 1 10 10 12 15 20 25 25 ns data hold time t dh 0000 0 0 0 ns        
    
  
   

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  ! " white electronic designs     1''' 51  657 .71 56 '' 655 711 5!5 1''8  !57 1''' 51  657 .71 56 '' 655 711 5!5 1''8  !57     &&'(%%! '%''% %'  & %%! ') " !"'%)  
 
 
  
   

  ! " white electronic designs      1''' 51  657 .71 56 '' 655 711 5!5 1''8  !57     1''' 51  657 .71 56 '' 655 711 5!5 1''8  !57 & %" !"'%%! '))  & %%! ')" !"'%)   0 0 /8 0 
 
 
 
   

  ! " white electronic designs  package 524: 68 lead, ceramic quad flat pack, low profile cqfp (g1t) 1''' 51  657 .71 56 '' 655 711 5!5 1''8  !57 25.27 (0.995) 0.13 (0.005) sq 23.88 (0.940) 0.25 (0.010) sq 0.38 (0.015) 0.05 (0.002) 20.3 (0.800) ref 1.27 (0.050) 4.06 (0.160) max 0.25 (0.010) max see detail "a" 0.84 (0.033) ref detail a 0.83 (0.033) 0.32 (0.013) 0 0 /8 0     * & %%! '))  1''' 51  657 .71 56 '' 655 711 5!5 1''8  !57 25.15 (0.990) C 0.25 (0.010) max 22.36 (0.880) C 0.25 (0.010) max 20.31 (0.800) ref 0.38 (0.015) C 0.05 (0.002) 1.27 (0.050) typ 5.10 (0.200) max 0.25 (0.010) C 0.10 (0.002) 24.0 (0.946) C 0.25 (0.010) 0.23 (0.009) ref r 0.127 (0.005) 2 o / 9 o 0.89 (0.035) C 1.14 (0.045) 1.37 (0.054) min 0.004 0.940" typ

 
   

  ! " white electronic designs   !4 blank = gold plated leads a = solder dip leads 3! 4 q= mil-std-883 compliant m = military screened -55c to +125c i = industrial -40c to +85c c = commercial 0c to +70c   !24 h1= 1.075" sq. ceramic hex-in-line package, hip (package 400) g2u = 22.4mm ceramic quad flat pack, cqfp (package 510) g2l = 22.4mm ceramic quad flat pack, cqfp (package 528) g1u 1 = 23.9mm ceramic quad flat pack, low profile cqfp (package 519) g1t = 23.9mm ceramic quad flat pack, low profile cqfp (package 524) g4t 1 =  40 mm low profile cqfp (package 502) !!56  3!  4 n = no connect at pin 8, 21, 28 and 39 in hip for upgrades l = low power  7   8!(+9 -+ user configurable as 256kx16 or 512kx8  
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  ! " white electronic designs        
128k x 32 sram module 55ns 66 pin hip (h1) 5962-93187 05h4x 128k x 32 sram module 45ns 66 pin hip (h1) 5962-93187 06h4x 128k x 32 sram module 35ns 66 pin hip (h1) 5962-93187 07h4x 128k x 32 sram module 25ns 66 pin hip (h1) 5962-93187 08h4x 128k x 32 sram module 20ns 66 pin hip (h1) 5962-93187 09h4x 128k x 32 sram module 17ns 66 pin hip (h1) 5962-93187 10h4x 128k x 32 sram module 15ns 66 pin hip (h1) 5962-93187 11h4x 128k x 32 sram module 55ns 68 lead cqfp low profile (g4t) 1 5962-95595 05hyx 1 128k x 32 sram module 45ns 68 lead cqfp low profile (g4t) 1 5962-95595 06hyx 1 128k x 32 sram module 35ns 68 lead cqfp low profile (g4t) 1 5962-95595 07hyx 1 128k x 32 sram module 25ns 68 lead cqfp low profile (g4t) 1 5962-95595 08hyx 1 128k x 32 sram module 20ns 68 lead cqfp low profile (g4t) 1 5962-95595 09hyx 1 128k x 32 sram module 17ns 68 lead cqfp low profile (g4t) 1 5962-95595 10hyx 1 128k x 32 sram module 15ns 68 lead cqfp low profile (g4t) 1 5962-95595 11hyx 1 128k x 32 sram module 55ns 68 lead cqfp/j (g2u) 5962-95595 05hmx 128k x 32 sram module 45ns 68 lead cqfp/j (g2u) 5962-95595 06hmx 128k x 32 sram module 35ns 68 lead cqfp/j (g2u) 5962-95595 07hmx 128k x 32 sram module 25ns 68 lead cqfp/j (g2u) 5962-95595 08hmx 128k x 32 sram module 20ns 68 lead cqfp/j (g2u) 5962-95595 09hmx 128k x 32 sram module 17ns 68 lead cqfp/j (g2u) 5962-95595 10hmx 128k x 32 sram module 15ns 68 lead cqfp/j (g2u) 5962-95595 11hmx 128k x 32 sram module 55ns 68 lead cqfp/j(g1u) 1 5962-95595 05h9x 128k x 32 sram module 45ns 68 lead cqfp/j (g1u) 1 5962-95595 06h9x 128k x 32 sram module 35ns 68 lead cqfp/j (g1u) 1 5962-95595 07h9x 128k x 32 sram module 25ns 68 lead cqfp/j (g1u) 1 5962-95595 08h9x 128k x 32 sram module 20ns 68 lead cqfp/j (g1u) 1 5962-95595 09h9x 128k x 32 sram module 17ns 68 lead cqfp/j (g1u) 1 5962-95595 10h9x 128k x 32 sram module 15ns 68 lead cqfp/j (g1u) 1 5962-95595 11h9x 128k x 32 sram module 55ns 68 lead cqfp/j (g2l) 5962-95595 05hax 128k x 32 sram module 45ns 68 lead cqfp/j(g2l) 5962-95595 06hax 128k x 32 sram module 35ns 68 lead cqfp/j(g2l) 5962-95595 07hax 128k x 32 sram module 25ns 68 lead cqfp/j(g2l) 5962-95595 08hax 128k x 32 sram module 20ns 68 lead cqfp/j(g2l) 5962-95595 09hax 128k x 32 sram module 17ns 68 lead cqfp/j(g2l) 5962-95595 010hax 128k x 32 sram module 15ns 68 lead cqfp/j(g2l) 5962-95595 011hax 
 
 


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